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Decodificadores

1. Códigos

Tabla 1. Tabla de verdad para decodificador de 7 segmentos.
Decimal \(a\) \(b\) \(c\) \(d\) \(e\) \(f\) \(g\)
0 1 1 1 1 1 1 1
1 0 1 1 0 0 0 0
2 1 1 0 1 1 0 1
3 1 1 1 1 0 0 1
4 0 1 1 0 0 1 1
5 1 0 1 1 0 1 1
6 1 0 1 1 1 1 1
7 1 1 1 0 0 0 1
8 1 1 1 1 1 1 1
9 1 1 1 0 0 1 1
A 1 1 1 0 1 1 1
B 0 0 1 1 1 1 1
C 1 0 0 1 1 1 0
D 0 1 1 1 1 0 1
E 1 0 0 1 1 1 1
F 1 0 0 0 1 1 1
dec7seg.v
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dec7seg_v2.v
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module dec7seg_v2 (
  input      [3:0] binary,
  output reg [6:0] leds       
);

  always @(binary) begin
    if (binary == 4'd0) begin
        leds = 7'b1111110;
    end else if (binary == 4'd1) begin
        leds = 7'b0110000; 
    end else if (binary == 4'd2) begin
        leds = 7'b1101101; 
    end else if (binary == 4'd3) begin
        leds = 7'b1111001; 
    end else if (binary == 4'd4) begin
        leds = 7'b0110011; 
    end else if (binary == 4'd5) begin
        leds = 7'b1011011; 
    end else if (binary == 4'd6) begin
        leds = 7'b1011111; 
    end else if (binary == 4'd7) begin
        leds = 7'b1110001; 
    end else if (binary == 4'd8) begin
        leds = 7'b1111111; 
    end else if (binary == 4'd9) begin
        leds = 7'b1110011; 
    end else if (binary == 4'd10) begin
        leds = 7'b1110111; 
    end else if (binary == 4'd11) begin
        leds = 7'b0011111; 
    end else if (binary == 4'd12) begin
        leds = 7'b1001110; 
    end else if (binary == 4'd13) begin
        leds = 7'b0111101; 
    end else if (binary == 4'd14) begin
        leds = 7'b1001111; 
    end else if (binary == 4'd15) begin
        leds = 7'b1000111; 
    end else begin 
        leds = 7'b0000000;
    end
  end

endmodule
dec7seg_v3.v
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module dec7seg_v3 (
  input  [3:0] binary,
  output [6:0] leds
);

  assign leds = (binary == 4'd0 ) ? 7'b1111110 :
                (binary == 4'd1 ) ? 7'b1111110 :
                (binary == 4'd2 ) ? 7'b1101101 :
                (binary == 4'd3 ) ? 7'b1111001 :
                (binary == 4'd4 ) ? 7'b0110011 :
                (binary == 4'd5 ) ? 7'b1011011 :
                (binary == 4'd6 ) ? 7'b1011111 :
                (binary == 4'd7 ) ? 7'b1110001 :
                (binary == 4'd8 ) ? 7'b1111111 :
                (binary == 4'd9 ) ? 7'b1110011 :
                (binary == 4'd10) ? 7'b1110111 :
                (binary == 4'd11) ? 7'b0011111 :
                (binary == 4'd12) ? 7'b1001110 :
                (binary == 4'd13) ? 7'b0111101 :
                (binary == 4'd14) ? 7'b1001111 :
                (binary == 4'd15) ? 7'b1000111 :
                                    7'b0000000 ;

endmodule

2. Verificación

dec7seg_tb.v
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`timescale 1ns / 100 ps
`include "hex_to_7seg.v"

module dec7seg_tb();
  // Definicion de señales de entrada y salida
  reg  [3:0] binary;
  wire [6:0] leds;

  //Instanciacion del modulo
  hex_to_7seg dut(.binary(binary), .leds(leds));

  // Variables para archivo, iteraciones y tiempo
  integer write_data;
  integer i;
  time t;

  initial begin
    // Configuracion de archivos de salida
    write_data = $fopen("dec7seg_tb_output.txt","w");

    // Salida de simulacion y variables de salida
    $dumpfile("dec7seg_tb.vcd");
    $dumpvars(0,dec7seg_tb);

    // Configuracion de formato de tiempo
    $timeformat(-9, 2, " ns", 10);

    // Simular todas las combinaciones posibles
    for (i = 0; i < 16; i++) begin
        binary = i; #20; t = $time;
        $fdisplay(write_data,"Time = %t, binary = %b, leds = %b", t, binary, leds);
    end

    // Cerrar archivo de texto
    $fclose(write_data);

    // Terminar simulacion
    $display("Test completed");
    $finish;

  end

endmodule;